CS302 Final Term Solved MCQs Mega File by Sonu Ilyas
- Type
- Final term past paper
- Course
- CS302 Digital Logic Design
- Size
- PDF 1.3 MB
- Updated
- 23 Oct 2026
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CS302 Digital Logic Design Solved MCQs Final Term (AIO)
Q1. A 8-bit serial in / parallel out shift register contains the value “8”, _____ clock signal(s) will be required to shift the value completely out of the register. (1 marks)
Correct answer: 8 (Page 356)
Q2. (1 marks)
Correct answer: Current state and external input (Page 318)
Q3. The divide-by-60 counter in digital clock is implemented by using two cascading counters: (1 marks)
Correct answer: Mod-6, Mod-10 (Page 299)
Q4. (1 marks)
Correct answer: True (Page 221)
Q5. (1 marks)
Correct answer: Hold time (Page 242)
Q6. (1 marks)
Correct answer: ENP, ENT (Page 285)
Q7. ____________ is said to occur when multiple internal variables change due to change in one input variable (1 marks)
Correct answer: Race condition (Page 267)
Q8. (1 marks)
Correct answer: Asynchronous, synchronous (Page 369)
Q9. (1 marks)
Correct answer: Mod-10 counter (Page 274)
Q10. (1 marks)
Correct answer: It is set to logic high (Page 356)
Q11. (1 marks)
Correct answer: 4 (Page 394)
Q12. (1 marks)
Correct answer: A
Q13. (1 marks)
Correct answer: 0000 (Page 34)
Q14. (1 marks)
Correct answer: Vout / Vin = - Rf / Ri (Page 446)
Q15. (1 marks)
Correct answer: Look Up Table (Page 439)
Q16. (1 marks)
Correct answer: NOT, OR, AND (Page 40)
Q17. (1 marks)
Correct answer: The size of the address bus of the microprocessor (Page 430)
Q18. (1 marks)
Correct answer: LIFO memory (Page 429)
Q19. (1 marks)
Correct answer: 127
Q20. ___________ is one of the examples of synchronous inputs. (1 marks)
Correct answer: J-K input (Page 235)
Q21. __________occurs when the same clock signal arrives at different times at different clock inputs due to propagation delay. (1 marks)
Correct answer: Clock Skew (Page 226)
Q22. Consider an up/down counter that counts between 0 and 15, if external input(X) is “0” the counter counts upward (0000 to 1111) and if external input (X) is “1” the counter counts downward (1111 to 0000), now suppose that the present state is “1100” and X=1, the next state of the counter will be ___________ (1 marks)
Correct answer: 1101 (not sure)
Q23. In a state diagram, the transition from a current state to the next state is determined by (1 marks)
Correct answer: Current state and the inputs (Page 332)
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