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CS302 Midterm MCQs Set 3 by VU Topper RM

Digital Logic Design PDF 433 KBUpdated 23 Oct 2026
Midterm past paper CS302 Midterm MCQs Set 3 by VU Topper RM PDF 433 KB
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Midterm past paper
Course
CS302 Digital Logic Design
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PDF 433 KB
Updated
23 Oct 2026
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Q1. Vu-Topper RM (1 marks)

Function tables are required to represent the input/output combinations for each segment in 7-segment display.

Seven Page 104

Q2. Vu-Topper RM (1 marks)

The decimal value “20” is equivalent to binary value __________ .

10100 Google

Q3. Vu-Topper RM (1 marks)

Decimal number system is Base________number system

Two Page 5

Q4. Vu-Topper RM (1 marks)

NOT gate is also known as an __________.

inverter circuit Google

Q5. Vu-Topper RM (1 marks)

A variable can have a _____ value.

0 or 1 value Page 71

Q6. Vu-Topper RM (1 marks)

________ come in different configurations they are identified by unique number

PALs Page 186

Q7. Vu-Topper RM (1 marks)

Arithmetic and Logic Units can perform any of the arithmetic operations and logic operations on _____ input values.

Two Page 147

Four

Q8. Vu-Topper RM (1 marks)

A __________ output can change from one state to the other by applying appropriate inputs.

Latch Page 211

Q9. Vu-Topper RM (1 marks)

When the error condition is not detected in BCD adder, the circuit output is 0 and the 2nd Adder input B is set to ______.

0000 Page 142

1111

A __________ attached to the Select inputs of the Demultiplexer routes the incoming serial bits to successive outputs where each bit is stored.

A counter Page 178

The ________ allows both its AND Gate array and the OR gate array to be programmed independently.

PLA Page 188

In 16-bit ALU, the Carry outputs C1, C2 and C3 from the Look-Ahead Carry generator circuit are generated after a gate delay of _____.

2 Page 151

The GAL16V8 has eight _________each connected to eight product terms.

OLMCs Page 200

In 1-to-4 demultiplexer, how many select lines are required

2 select lines Google

In the Iterative Circuit for A>B, the output of Module 0 is 1 when

A>B of Module 1 is 1 Page 155

A circuit that converts the n inputs to 2^n outputs is called________.

Decoder Google

The Decimal-to-BCD Encoder has _______ output

Ten Page 166

Five

In a Digital System, Binary data is used and represented in__________.

Parallel Page 175

The absence of a _____________ element in sequential circuit restricts the use of digital combinational circuits to certain application areas.

Memory Page 210

System having memory elements are called______ circuits.

Sequential circuits Google

Demultiplexer is also called _________

Data Distributor Page 178

When the fuse of the _________ gate input is blown to set the input to logic high, the output of the XOR gate is opposite of the OR gate output.

XOR Page 186

Combinational Logic is used for combinational circuits, where as Registered Logic is based on ------circuits.

4 Wire Page 194

The 4-bit ALU (74XX381) only has three function select inputs allowing only ____ different arithmetic and logic functions.

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