CS401 Final Term Solved MCQs with References by Moaaz

CS401- Computer Architecture and Assembly Language Programming

Solved MCQS From Final term Papers · JULY 4 , 2012 · PSMD01 · Spring 2010

Suppose AL contains 5 decimal then after two left shifts produces the value as

1. 5
2. 10
3. 15
4. 20 (Page 52)

Correct answer: 20 (Page 52)

In graphics mode a location in video memory corresponds to a _____________ on the screen.

1. line
2. dot (Page 149)
3. circle
4. rectangle
5. static
6. dynamic (Page 141)
7. easy
8. difficult

The thread registration code initializes the PCB and adds it to the linked list so that the __________ will give it a turn.

1. assembler
2. scheduler (Page 141)
3. linker
4. debugger
5. High resolution Mode (Page 180)
6. Low resolution Mode
7. Medium resolution Mode
8. Very High resolution Mode
9. BIOS
10. DOS (Page 155)
11. Both
12. None

Which of the following IRQs is derived by a key board?

1. IRQ 0
2. IRQ 1 (Page 114)
3. IRQ 2
4. IRQ 3

Correct answer: IRQ 1 (Page 114)

Which of the following IRQs is used for Floppy disk derive?

1. IRQ 4
2. IRQ 5
3. IRQ 6 (Page 114)
4. IRQ 7

Correct answer: IRQ 6 (Page 114)

Which of the following pins of a parallel port connector are grounded?

1. 10-18
2. 18-25 (Page 125)
3. 25-32
4. 32-39
5. GDTR
6. IDTR (Page 182)
7. IVT
8. IDTT

In NASM an imported symbol is declared with the ............................ while and exported symbol is declared with the............................

1. Global directive, External directive
2. External directive, Global directive (Page 189)
3. Home Directive, Foreign Directive
4. Foreign Directive, Home Directive

Correct answer: External directive, Global directive (Page 189)

In 68K processors there is a ........................ program counter (PC) that holds the address of currently executing instruction

1. 8bit
2. 16bit
3. 32bit (Page 191)
4. 64bit

Correct answer: 32bit (Page 191)

To reserve 8-bits in memory ___ directive is used.

1. db (Page 25)
2. dw
3. dn
4. dd

Correct answer: db (Page 25)

In the “mov ax, 5” 5 is the __________ operand.

1. source (Page 18)
2. destination
3. memory
4. register

Correct answer: source (Page 18)

RETF will pop the segment address in the

1. CS register (Page 72)
2. DS register
3. SS register
4. ES register

Correct answer: CS register (Page 72)

For the execution of the instruction “DIV BL”, the implied dividend will be stored in

1. AX (Page 85)
2. BX
3. CX
4. DX

Correct answer: AX (Page 85)