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CS501 Midterm Solved Paper 2013

Advance Computer Architecture PDF 298 KBUpdated 23 Oct 2026
Midterm past paper CS501 Midterm Solved Paper 2013 PDF 298 KB
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Midterm past paper
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CS501 Advance Computer Architecture
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PDF 298 KB
Updated
23 Oct 2026
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Total Questions: 26 · MCQs: 20 · Subjective: 6 · Whole Paper is given below: · ( Marks: 1 )

FALCON-A processor bus has 16 lines or is 16-bits wide while that of SRC _____wide. 8-bits 16-bits

32-bits

(Page 157)

64-bits

Q2. Which one of the following is a bi-stable device, capable of storing one bit of information? (1 marks)

Decoder

Flip-Flop

(Page 76)

Multiplexer Diplexer

Q3. Which instruction is used to store register to memory using relative address? ld instruction (1 marks)

ldr instruction lar instruction

str instruction

(Page 48)

Q4. The instruction ___________ will load the register R3 with the contenets of the m\emory location M [PC+56] (1 marks)

Add R3, 56 lar R3, 56

ldr R3, 56

(Page 56)

str R3, 56

Q5. _______ oeaini eurdt hnetepoesrssaet nw,dfndvle (1 marks)

Change

Reset

(Page 194)

Update

Q6. which type of instructions help in changing the flow of the program as and when required?

Arithmetic

Control

(Page 137)

Data transfer Floating point

Q7. Which one of the following registers holds the address of the next instruction to be executed? Accumulator (1 marks)

Instruction Register

Program Counter (Page 151)

Q8. The external interface of FALCON-A consists of a ______address bus and ______a data bus. 8-bit. 8-bit (1 marks)

16-bit. 16-bit

16-bit. 24-bit 16-bit. 32-bit

Q9. What is the instruction length of the SRC processor? (1 marks)

  1. 8 bits
  2. 16 bits
  3. 32 bits (Page 134)
  4. 64 bits

Correct answer: 32 bits (Page 134)

Q10. P: R3 ¬ R5 (1 marks)

MAR ¬ IR

These two are instructions written using RTL .If these two operations is to occur simultaneously then which symbol will we use to separate them so that it becomes a correct statement with the condition that two operations occur simultaneously?

  1. Arrow ¬
  2. Colon :
  3. Comma , (Page 69)
  4. Parentheses ()

Correct answer: Comma , (Page 69)

Q11. The processor must have a way of saving information about its state or context so that it can be restored upon return from the -------------  (1 marks)

  1. Function 
  2. Stack 
  3. Thread

Q12. Which one of the following register holds the instruction that is being executed? (1 marks)

  1. Accumulator
  2. Address Mask
  3. Instruction Register (Page 152)
  4. Program Counter

Correct answer: Instruction Register (Page 152)

Q13. The code size of 2-address instruction is ________________. (1 marks)

  1. 5 bytes
  2. 7 bytes (Page 36)
  3. 3 bytes
  4. 2 bytes

Correct answer: 7 bytes (Page 36)

Q14. An “assembler” that runs on one processor and translates an assembly language program written for another processor into the machine language of the other processor is called a ---------------- (1 marks)

  1. compiler
  2. cross assembler (Page 26)
  3. debugger
  4. linker

Correct answer: cross assembler (Page 26)

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