CS604 Quiz 2 2021 by Usman Yousaf

CS604 Quiz 2 File 2021 | BY USMAN YOUSAF

1. In ____ memory management programmer’s view of memory representation is

called.

a)

b)

c) Offset

d) Logical address

2.

a) Page size

b)

c) Page table size

d) Page directory Page 170

3. Logical memory is divided into blocks of the same size called______.

a) Page size

b) Page Page 162

c) Frame

d) Table

4. Following statement is Not true about Virtual memory.

a) Virtual memory makes the processes to stuck when the collective size of

all the processes becomes greater than the size of main memory. Page 185

b) Virtual memory help in executing bigger programs even greater in size

that of main memory.

c) Virtual memory makes the task of programming easier because the

programmer need not worry about the amount of physical memory.

d) Virtual memory also allows files and memory to be shared by several

different processes through page sharing.

5. How does a logical-address space is represented.

a) Through Segments

b) Through Critical section

6. Each page is a power of------- bytes long in paging scheme.

a) 2 Page 162

b)

c)

d)

7. A -------system is similar to paging system with swapping.

a)

b) Page fault

c) Context switching

d) Demand paging Page 186

8. Assume a logical address space of 16 pages of 1024 words, each mapped into a

physical memory of 32 frames. Each word consists of 2 bytes. What will be the

total number of bits required for p (page number)?

a) 32 bits

b) 8 bits c) 4 bits Page No.165

d) 16 bits

9. The segment table maps the ___________ to physical addresses.

a) Shared page addresses

b) Two-dimensional logical addresses Page 175

c) One-dimensional logical addresses

d) Page addresses

10. Every----------generated by the CPU is divided into two parts: a page number (p)

and a page offset (d).

a) Page

b)

c) Process address space

d) Logical addresses Page 163

11. Intel is basically designed for following Operating Systems except_____.

a) MULTICS Page 163

b) Linux

c) OS/2

d) Windows

12. Following schemes allow efficient implementations of page tables EXCEPT

a) Binary page Table

b) Inverted Page Table

c) Hashed Page Table

d) Hierarchical/ Multilevel Paging

13. To eliminate external fragmentation in segmentation the scheme used is _______.

a) Variable size partition scheme

b) Variable size paging scheme

c) Fixed size partition scheme

d) Fixed size paging scheme

14. ________ is commonly implemented as demand paging.

a) Logical Addressing

b)

c) Paging

d)

15. External Fragmentation takes place in_________

a) Multiprogramming with Variable Tasks (MVT)

b) Multiprogramming with Fixed Tasks (MFT)

c) Multi-tasking

d) Paging

16. Memory protection in paging is achieved by associating _________ with each

page. This each page. This bit indicates whether the page is in the process address

space or not.

a) paging table

b) counting bits

c) segment table d) protection bits

17. The_______ protection scheme guards against a process trying to access a page

that does not belong to its address space.

a) Hybrid

b) Tertiary

c) Secondary

d) Primary

18. The size of a page is defined by ______.

a) Logical Memory

b) CPU Page 165

c) Page Table

d)

19. The logical address of Intel 80386 is ______.

a) 36 bits

b) 48 bits

c) 64 bits

d) 128 bits

20. In paged segmentation, we divide every segment in a process into ______pages.

a) Fixed size

b) Variable size

21. Segmentation is a memory management scheme that supports ______?

a) Hardware’s view of memory

b) System’s view of memory

c) Programmer’s view of memory

d)

22. Assume a logical address space of 16 pages, each of 1024 words, each mapped

into ta physical memory of 32 frames. Each word consists of 2bytes. What will be

the total number of bits required for f (frames)?

a)

b)

c)

d)

23. __------------is the separation of user logical memory from physical memory.

a)

b)

c) ROM

d)

24. In pages segmentation the logical address is legal if d is _________ segment

length.

a) Equal to

b) Greater than

c) Less than

d) 64 bits

e) Greater than or equal to

25. Intel 80386 used paged segmentation with _______ level paging.

a) Three