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CS302 Midterm Solved MCQs by Junaid

Digital Logic Design PDF 1.7 MBUpdated 23 Oct 2026
Midterm past paper CS302 Midterm Solved MCQs by Junaid PDF 1.7 MB
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Midterm past paper
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CS302 Digital Logic Design
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PDF 1.7 MB
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23 Oct 2026
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Q1. Which of the following is a volatile memory?

  1. PROM
  2. DRAM
  3. EPROM
  4. EEPROM

Q2. ________ is used when the output is connected back to the input of the PAL or if the output pin is used as an input only.

  1. Combinational Input/output
  2. Combinational Output
  3. Combinational Input

AL-JUNAID INSTITUTE OF GROUP d. Programmable polarity

Q3. The AND Gate performs a logical ________ function.

  1. Addition
  2. Subtraction
  3. Multiplication
  4. Division

Q4. The Adjacent 1s Detector accepts 4-bit inputs. If ________ adjacent 1s are detected in the input, the output is set to high.

  1. 2
  2. 4
  3. 1 Not answer
  4. 0

Q5. In the keyboard encoder, how many times per second does the ring counter scan the key board?

  1. 600 scans/second
  2. 625 scans/second
  3. 650 scans/second
  4. 700 scans/second

Q6. The FAST Model Page Access allows ________ memory read and access times when reading successive data values stored in consecutive locations on the same row.

  1. Slow
  2. Faster
  3. Medium
  4. Modern

Q7. GAL can be reprogrammed as instead of fuses E2CMOS logic is used which can be programmed to connect a ________ with a ________.

  1. column, row
  2. row, column
  3. column, column
  4. row, row

Q8. Which of the following Output Equations determines the output of the State Machine?

  1. MIN = Q0Q1
  2. MAX = Q0Q1EN
  3. MIN = Q0Q1EN
  4. MAX = Q1EN

Q9. The maximum value, represented by a single hexadecimal digit is ________.

  1. "E"
  2. "F"
  3. "G"
  4. "H"

10. If the voltage drop across the active load is 0 volts due to absence of current the comparator output is a

a. 0

b. 1

11. The Static Ram (SRAM) is non-volatile and is not a ________ density memory as a latch is required to store a single bit of information.

a. Low

b. High

c. Medium d. Hot

12. DE Morgan’s two theorems prove the equivalency of the NAND and ________ gates and the NOR and ________ gates respectively.

a. Negative-OR, Negative-AND

b. Negative-AND, Positive-OR c. Positive-OR, Negative-AND d. Positive-OR, Positive-AND

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