- Type
- Midterm past paper
- Course
- CS302 Digital Logic Design
- Size
- PDF 1.6 MB
- Updated
- 23 Oct 2026
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Text from pages 2, 3, 4 of 41. Download the file for all 41 pages.
Q1. Which of the following is a volatile memory?
- PROM
- DRAM
- EPROM
- EEPROM
- ________ is used when the output is connected back to the input of the PAL or if the output pin is used as an input only.
- Combinational Input/output
- Combinational Output
- Combinational Input AL-JUNAID INSTITUTE OF GROUP
- Programmable polarity
- The AND Gate performs a logical ________ function.
- Addition
- Subtraction
- Multiplication
- Division
- The Adjacent 1s Detector accepts 4-bit inputs. If ________ adjacent 1s are detected in the input, the output is set to high.
- 2
- 4
- 1
- 0
Q5. In the keyboard encoder, how many times per second does the ring counter scan the key board?
- 600 scans/second
- 625 scans/second
- 650 scans/second
- 700 scans/second
- The FAST Model Page Access allows ________ memory read and access times when reading successive data values stored in consecutive locations on the same row.
- Slow
- Faster
- Medium
- Modern
- GAL can be reprogrammed as instead of fuses E2CMOS logic is used which can be programmed to connect a ________ with a ________.
- column, row
- row, column
- column, column
- row, row
Q8. Which of the following Output Equations determines the output of the State Machine?
- MIN = Q0Q1
- MAX = Q0Q1EN
- MIN = Q0Q1EN
- MAX = Q1EN
- The maximum value, represented by a single hexadecimal digit is ________.
- "E"
- "F"
- "G"
- "H"
10. If the voltage drop across the active load is 0 volts due to absence of current the comparator output is a
- 0
- 1
11. The Static Ram (SRAM) is non-volatile and is not a ________ density memory as a latch is required to store a single bit of information.
- Low
- High
- Medium
- Hot
12. DE Morgan’s two theorems prove the equivalency of the NAND and ________ gates and the NOR and ________ gates respectively.
- Negative-OR, Negative-AND
- Negative-AND, Positive-OR
- Positive-OR, Negative-AND
- Positive-OR, Positive-AND
13. Two signals ________ and ________ provide the timing inputs to the State Machine.
- NSSR and EWSR
- LTIME and STIME
- PTIME and QTIME
- NSGrn and NSYel
14. The 74HC163 is a 4-bit Synchronous counter, it has ________ data output pins.
- 2
- 4
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