- Type
- Midterm past paper
- Course
- CS302 Digital Logic Design
- Size
- PDF 390 KB
- Updated
- 23 Oct 2026
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CS302 Midterm Solved McQs Papers By Waqar Sidhu
(File 1)
Q1. The range of Excess-8 code is from _______ to _______.
Q2. The decimal “17” in BCD will be represented as _________.
Q3. The four outputs of two multiplexers, connected to from a 16,input multiplexer are connected together through a 4-input ______ gate.
Q4. A standard interface for programming the ln-System PLD consists of _________.
Q5. ________ Dual, 4-input multiplexer can be connected to form a 16-input multiplexer.
Q6. S-R latch can be implemented by using ________ gates.
Q7. A product term is 0 when _____________.
Q8. What will be the output of a 3-input NAND gate for the input values: A=1, B=0, C=1
Q9. ________ is not a valid hexadecimal number.
Q10. 2’s complement of any binary number can be calculated by
Q11. A BCD to 7- Segment decoder has _____ inputs and _____ outputs.
Q12. Which of the following simplification method is intended to be used FOR Boolean expressions having more than four variables?
Q13. In the following Karnaugh map, which group has “legal grouping”?
Q14. What are the values of sum and carry out when two 4-bit binary number (1011 and 1111) are applied to a 4-bit parallel adder and carry input is 1.
out 1 0111,C
out 1 1111,C
out 1 1011,C
out 1 1100,C
Q15. A particular half-adder has ______ inputs and _________ output(s)
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