- Type
- Midterm past paper
- Course
- CS302 Digital Logic Design
- Size
- PDF 1.1 MB
- Updated
- 23 Oct 2026
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Text from pages 2, 3, 4 of 65. Download the file for all 65 pages.
Q1. Vu-Topper RM (1 marks)
Function tables are required to represent the input/output combinations for each segment in 7-segment display. A. One B. Two C. Five
D. Seven Page 104
Q2. Vu-Topper RM (1 marks)
The decimal value “20” is equivalent to binary value __________ .
A. 10100 Google
B. 00110 C. 11001 D. 00111
Q3. Vu-Topper RM (1 marks)
Decimal number system is Base________number system
A. Two Page 5
B. One C. Five D. Eight
Q4. Vu-Topper RM (1 marks)
NOT gate is also known as an __________.
A. Inverter circuit Google
B. Switch circuit C. Both D. None
Q5. Vu-Topper RM (1 marks)
A variable can have a _____ value.
A. 0 or 1 value Page 71
B. 0 or 0 value C. 1 or 0 value D. 1 or 1 value
Q6. Vu-Topper RM (1 marks)
________ come in different configurations they are identified by unique number
A. PALs Page 186
B. PLAS C. DALS D. ADLS
Q7. Vu-Topper RM (1 marks)
Arithmetic and Logic Units can perform any of the arithmetic operations and logic operations on _____ input values. A. One
B. Two Page 147
C. Four D. Three
Q8. Vu-Topper RM (1 marks)
A __________ output can change from one state to the other by applying appropriate inputs.
A. Latch Page 211
B. Logic C. Analog D. None of these
Q9. Vu-Topper RM (1 marks)
When the error condition is not detected in BCD adder, the circuit output is 0 and the 2nd Adder input B is set to ______. A.
0000 Page 142
B. 1111 C. 0011 D. 1100
Q10. Vu-Topper RM (1 marks)
A __________ attached to the Select inputs of the Demultiplexer routes the incoming serial bits to successive outputs where each bit is stored. A. Data B. Buffer C. Memory
D. A counter Page 178
Q11. Vu-Topper RM (1 marks)
The ________ allows both its AND Gate array and the OR gate array to be programmed independently.
A. PLA Page 188
B. DLA C. LPS D. PAL
Q12. Vu-Topper RM (1 marks)
In 16-bit ALU, the Carry outputs C1, C2 and C3 from the Look-Ahead Carry generator circuit are generated after a gate delay of _____.
A. 2 Page 151
B. 4 C. 3 D. 1
Q13. Vu-Topper RM (1 marks)
The GAL16V8 has eight ______each connected to eight product terms.
A. OLMCs Page 200
B. LMDS C. PLDS D. MNLS
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