CS302 Midterm Solved Paper 4

MIDTERM EXAMINATION

CS302- Digital Logic Design

Q1. A SOP expression is equal to 1 ______________ (1 marks)

1. All the variables in domain of expression are present
2. At least one variable in domain of expression is present.
3. When one or more product terms in the expression are equal to 0.
4. When one or more product terms in the expression are equal to 1.

Q2. The output A < B is set to 1 when the input combinations is __________ (1 marks)

1. A=10, B=01
2. A=11, B=01
3. A=01, B=01
4. A=01, B=10

Q3. Two 2-bit comparator circuits can be connected to form single 4-bit comparator (1 marks)

1. True
2. False

Q4. High level Noise Margins (VNH) of CMOS 5 volt series circuits is (1 marks)

1. 0.3 V
2. 0.5 V
3. 0.9 V
4. 3.3 V

Q5. If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________ (1 marks)

1. 24.582
2. 2.4582
3. 24582
4. 0.24582

Q6. The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol’+’ here represents OR Gate. (1 marks)

1. Undefined
2. One
3. Zero
4. 10 (binary)

Q7. If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________. (1 marks)

1. SET
2. RESET
3. Clear
4. Invalid

Q8. 3.3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series. (1 marks)

1. Low switching speeds, high power dissipation
2. Fast switching speeds, high power dissipation
3. Fast switching speeds, very low power dissipation
4. Low switching speeds, very low power dissipation

Q9. The binary value “1010110” is equivalent to decimal __________ (1 marks)

1. 86
2. 87
3. 88
4. 89

Q10. The _______ Encoder is used as a keypad encoder. (1 marks)

1. 2-to-8 encoder
2. 4-to-16 encoder
3. BCD-to-Decimal
4. Decimal-to-BCD Priority

Q11. How many data select lines are required for selecting eight inputs? (1 marks)

1. 1
2. 2
3. 3
4. 4

Q12. the diagram above shows the general implementation of ________ form (1 marks)

1. boolean
2. arbitrary
3. POS