CS302 Midterm Solved Paper 5

MIDTERM EXAMINATION CS302- Digital Logic Design

Q1. GAL can be reprogrammed because instead of fuses _______ logic is used in it (1 marks)

1. E2CMOS
2. TTL
3. CMOS+
4. None of the given options

Correct answer: E2CMOS

Q2. The device shown here is most likely a (1 marks)

1. Comparator
2. Multiplexer
3. Demultiplexer
4. Parity generator

Correct answer: Multiplexer

Q3. If “1110” is applied at the input of BCD-to-Decimal decoder which output pin will be activated: (1 marks)

1. 2nd
2. 4th
3. 14th
4. No output wire will be activated

Correct answer: No output wire will be activated

Q4. Half-Adder Logic circuit contains 2 XOR Gates (1 marks)

1. True
2. False

Correct answer: False

Q5. A particular Full Adder has (1 marks)

1. 3 inputs and 2 output
2. 3 inputs and 3 output
3. 2 inputs and 3 output
4. 2 inputs and 2 output

Correct answer: 3 inputs and 2 output

Q6. C (1 marks)

B A Sum AB B A C CarryOut are the Sum and CarryOut expression of

1. Half Adder
2. Full Adder
3. 3-bit parralel adder
4. MSI adder cicuit

Correct answer: Full Adder

Q7. A Karnaugh map is similar to a truth table because it presents all the possible values of input variables and the resulting output of each value. (1 marks)

1. True
2. False

Correct answer: True

Q8. The output A < B is set to 1 when the input combinations is __________ (1 marks)

1. A=10, B=01
2. A=11, B=01
3. A=01, B=01
4. A=01, B=10

Correct answer: A=01, B=10

Here output combination should A < B

Q9. The 4-variable Karnaugh Map (K-Map) has _______ cells for min or max terms (1 marks)

1. 4
2. 8
3. 12
4. 16

Correct answer: 16

Q10. Generally, the Power dissipation of _______ devices remains constant throughout their operation. (1 marks)

1. TTL
2. CMOS 3.5 series
3. CMOS 5 Series
4. Power dissipation of all circuits increases with time.

Correct answer: TTL

Q11. The decimal “8” is represented as _________ using Gray-Code. (1 marks)

1. 0011
2. 1100
3. 1000
4. 1010

Correct answer: 1100

Q12. (A+B).(A+C) = ___________ (1 marks)

1. B+C
2. A+BC
3. AB+C
4. AC+B

Correct answer: A+BC

Q13. A.(B + C) = A.B + A.C is the expression of _________________ (1 marks)

1. Demorgan’s Law
2. Commutative Law
3. Distributive Law
4. Associative Law

Correct answer: Distributive Law

Q14. NOR Gate can be used to perform the operation of AND, OR and NOT Gate (1 marks)

1. FALSE
2. TRUE

Correct answer: FALSE

Q15. In ANSI/IEEE Standard 754 “Mantissa” is represented by ___32-bits______ bits (1 marks)

1. 8-bits
2. 16-bits
3. 32-bits
4. 64-bits

Correct answer: 32-bits