CS302 Midterm Subjective and MCQs

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Table of Content

TABLE OF CONTENT ..................................................................................................................................................................... 2

QUESTION: HOW CAN A D FLIP-FLOP CAN BE MADE TO TOGGLE? ........................................................................................................ 6 QUESTION: WHAT IS THE DIFFERENCE BETWEEN A COUNTER AND SHIFT REGISTER ? ................................................................................. 6 QUESTION: HOW MANY OUTPUTS AND INPUTS GAL22V10 HAVE? .................................................................................................... 6 QUESTION: WHAT IS AN EQUIVALENT REPRESENTATION FOR THE BOOLEAN EXPRESSION A' + 1 ? ................................................................ 6 QUESTION: WHAT IS K-MAP AND WHY WE USED IT?........................................................................................................................ 6 QUESTION: EACH STAGE IN A SHIFT REGISTER REPRESENTS HOW MUCH STORAGE CAPACITY? ...................................................................... 7 QUESTION: WHAT ARE PLD'S? HOW ARE THEY CLASSIFIED. ............................................................................................................... 7 QUESTION: WHAT ARE FLIP-FLOPS? ............................................................................................................................................ 7 QUESTION: IF AN S-R LATCH HAS A 0 ON THE S INPUT AND A 1 ON THE R INPUT AND THEN THE R INPUT GOES TO 0, THEN WHAT THE LATCH WILL BE?

QUESTION: IN A 4-BIT JOHNSON COUNTER SEQUENCE THERE ARE A TOTAL OF HOW MANY STATES, OR BIT PATTERNS? ...................................... 7 QUESTION: EXPLAIN THE TRUTH TABLE AND TIMING DIAGRAM OF GATED S-R LATCH AND GATED D LATCH IN DETAIL. ...................................... 7 QUESTION: WHAT IS THE DIFFERENCE BETWEEN ASYNCHORONOUS AND SYNCHRONOUS COUNTERS? ........................................................... 7 QUESTION: WHAT IS MEANT BY D IN GATED D LATCH AND WHAT IS THE FUCTION OF THIS D INPUT. WHAT IS THE BASIC DIFFERENCE BETWEEN LATCHS AND FLIP-FLOPS? ................................................................................................................................................................ 8 QUESTION: I CANNOT UNDERSTAND THE TIMING DIAGRAM FOR THE MASTER SLAVE FLIP FLOP. ................................................................... 8 QUESTION: I AM NOT ABLE TO UNDERSTAND THE TRUTH TABLE AND TIMING DIAGRAM OF " S-R EDGE-TRIGGED FLIP-FLOP, D EDGE-TRIGGED FLIPFLOP AND J-K EDGE-TRIGGED FLIP-FLOP KINDLY EXPLAIN IT IN DETAIL.......................................................................................................... 8 QUESTION: WHAT IS MULTIPLEXER AND WHAT ARE ITS APPLICATIONS AND EXPRESSION SIMPLIFICATION USING MULTIPLEXER? .......................... 9 QUESTION: EXPLAIN S-R LATCH? WHAT DO YOU MEAN BY BI-STABLE DEVICES? .................................................................................... 10 QUESTION: WHAT IS MEANT BY TRIGGERING OR TRIGGERING EDGE OF CLOCK PULSE AND SYNCHRONOUS? ALSO WHAT IS TRIGGING TRANSITION OF CLOCK? QUESTION: HOW TO UP AND DOWN THE CLOCK IN J K FLOPS PLZ EXPLAIN THE EXAMPLE? ....................................................................... 10 QUESTION: FOR BCD NUMBERS THAT ADD UP TO AN INVALID BCD NUMBER OR GENERATE A CARRY, THE NUMBER 6 (0110) IS ADDED TO THE INVALID NUMBER, WHY ? .............................................................................................................................................................. 11 QUESTION: WHY DO WE USE +0V AND +5V INSTEAD OF +0V AND +1V IN DLD, WHEN IT IS ALWAYS '0' AND '1' ? ...................................... 11 QUESTION: WHAT IS BCD AND HOW DO WE WRITE THEM?............................................................................................................. 11 QUESTION: WHERE DO WE USE CAVEMAN NUMBER SYSTEM ? ........................................................................................................ 11 QUESTION: WHAT IS GRAY CODE AND HOW DO WE WRITE THEM? .................................................................................................... 12 GLOSSARY (UPDATED VERSION) ................................................................................................................................................ 12 ABEL : ................................................................................................................................................................................ 12 Adder : ............................................................................................................................................................................... 12 address : ............................................................................................................................................................................ 12 address bus : ...................................................................................................................................................................... 12 Analog : ............................................................................................................................................................................. 12 Analog Computer : ............................................................................................................................................................. 12 AND Gate : ......................................................................................................................................................................... 12 Binary : .............................................................................................................................................................................. 12 Binary Code : ...................................................................................................................................................................... 13 Binary Coded Decimal (BCD) : ............................................................................................................................................. 13 Bit : .................................................................................................................................................................................... 13 Boolean Algebra :............................................................................................................................................................... 13 Cascade : ........................................................................................................................................................................... 13 Clock : ................................................................................................................................................................................ 13 CMOS :............................................................................................................................................................................... 13 Combinational Logic : ......................................................................................................................................................... 13 Comparator : ..................................................................................................................................................................... 13 Counter: ............................................................................................................................................................................. 13 Data selector :.................................................................................................................................................................... 13 Decoder : ........................................................................................................................................................................... 13 Digital System : .................................................................................................................................................................. 13 Emitter: ............................................................................................................................................................................. 13 Encoder: ............................................................................................................................................................................ 13 Even parity : ....................................................................................................................................................................... 13 Exponent: .......................................................................................................................................................................... 13 Fan in : ............................................................................................................................................................................... 13 Fan out : ............................................................................................................................................................................ 13 flip-flop : ............................................................................................................................................................................ 13 GAL: ................................................................................................................................................................................... 13 Gate: ................................................................................................................................................................................. 14 Gate Array : ....................................................................................................................................................................... 14 Gray code: ......................................................................................................................................................................... 14 half-adder : ........................................................................................................................................................................ 14 High: .................................................................................................................................................................................. 14 High logic: .......................................................................................................................................................................... 14 IC : ..................................................................................................................................................................................... 14 Inverter: ............................................................................................................................................................................. 14 JK flip-flop: ......................................................................................................................................................................... 14 Karnaugh map : ................................................................................................................................................................. 14 Latch: ................................................................................................................................................................................ 14 LED: ................................................................................................................................................................................... 14 Logic: ................................................................................................................................................................................. 14 Low:................................................................................................................................................................................... 14 Low logic : .......................................................................................................................................................................... 14 Mantissa: ........................................................................................................................................................................... 14 MSI: ................................................................................................................................................................................... 14 Multiplexer: ....................................................................................................................................................................... 14 NAND gate : ....................................................................................................................................................................... 14 NOR gate : ......................................................................................................................................................................... 14 NOT : ................................................................................................................................................................................. 14 octal : ................................................................................................................................................................................ 14 odd parity : ........................................................................................................................................................................ 15 OR gate :............................................................................................................................................................................ 15 overflow :........................................................................................................................................................................... 15 PAL : .................................................................................................................................................................................. 15 parity : ............................................................................................................................................................................... 15 parity bit : .......................................................................................................................................................................... 15 PLA : .................................................................................................................................................................................. 15