- Type
- MCQs
- Course
- CS302 Digital Logic Design
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- PDF 315 KB
- Updated
- 23 Oct 2026
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CS 302 GRAND QUIZ
Sr No.
MCQS QUESTION
ANSWER
1. The FAST Model Page Access allows ________ memory read and access times when reading successive data values stored in consecutive locations on the same row. Faster
2. In NAND based S-R latch, output of each ________ gate is connected to the input of the other ________ gate. NAND, NAND
3. Why demultiplexer is called a data distributor? Single input to Single Output
4. ________ is used when the output is connected back to the input of the PAL or if the output pin is used as an input only. Combinational Input
5. The n flip-flops store ________ states.
2^n
6. The NOR logic gate is the same as the operation of the ________ gate with an inverter connected to the output. NAND
7. The Adjacent 1s Detector accepts 4-bit inputs. If ________ adjacents 1s are detected in the input, the output is set to high.
8. As data values are written or read from the RAM Stack Pointer Register increments or decrements its contents always pointing to the stack ________. Top
9. In memory write cycle, the time for which the WE signal remains active is known as the ________. Write pulse width
10. You have to choose suitable option when your timer will reset by considering this given code: TRSTATE.CLK = clk; TMRST: = (TRSTATE = = NSY2) # (TRSTATE = = EWY2); NSY2 or EWY2
11. Two signals ________ and ________ provide the timing inputs to the State Machine. PTIME and QTIME
12. PALs tend to execute ________ logic. SOP
13. Which signal must remain valid in memory write cycle after data is applied at the data input lines and must remain valid for a minimum time duration tWD? -WE
14. Memory is arranged in ________. twodimensional manner
15. The Static Ram (SRAM) is non-volatile and is not a ________ density memory as a latch is required to store a single bit of information. High
16. Implementing the Adjacent 1s detector circuit directly from the function table based on the SOP form requires ________ gates for the 8 product terms (minterms) with an 8-input OR gate. 8 AND 17. The maximum value, represented by a single hexadecimal digit is ________. "F"
18. The ________ input overrides the ________ input. Asynchronous,
A SOP expression can be implemented by an ________ combination of gates. AND-OR
20. The outputs of SR latches in elevator state machine are feed back to the ________ gate array for connection to the D-flipflops. AND
21. The Transition table is very similar to the ________ table. State
22. The ABEL Input file can use a ________ instead of the equation to specify the Boolean expressions. Truth Table
23. A 3-variable karnaugh map has eight cells
24. If the number of samples that are collected is reduced by half, the reconstructed signal will be ________ from/to the original. Same
25. Adding two octal numbers "36" and "71" result in
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