CS302 Quiz 3 Set 2 by VU Topper RM

Q1. Vu-Topper RM (1 marks)

The next state table for REQ1, FLOOR1 and OPEN inputs indicates that the ________ can be pressed at any time either on the first floor or the second floor in elevator. REQ0 OPEN

REQ1 Page370

FLOOR1

Q2. Vu-Topper RM (1 marks)

A decade counter is ________ Mod-3 counter Mod-5 counter Mod-8 counter

Mod-10 counter Page274

Q3. Vu-Topper RM (1 marks)

PALs tend to execute ________ logic. SPD

SOP

SAC SAP

Q4. Vu-Topper RM (1 marks)

A counter is implemented using three (3) flip-flops, possibly it will have ________ maximum output status.

8 Page272

Q5. Vu-Topper RM (1 marks)

There are _____________ possible combinations of the Simple Mode in which OLMC can be configured.

Four Five Six

Q6. Vu-Topper RM (1 marks)

Once the state diagram is drawn for any sequential circuit the next step is to draw Transition table Karnaugh map

Next- state table

Logic expression

Q7. Vu-Topper RM (1 marks)

In gated SR latch, what is the value of the output if EN=1, S=0 and R=1?

Q8. Vu-Topper RM (1 marks)

If S=1 and R=0, then for positive edge triggered flip-flop

1 Page230

Q9. Vu-Topper RM (1 marks)

According to Moore circuit, the output of synchronous sequential circuit depend/s on ______ of flip flop. Previous state

Present state

Next state External state

Q10. Vu-Topper RM (1 marks)

The outputs of SR latches in elevator state machine are feed back to the ________ gate array for connection to the D-flipflops. NOT

AND Page372

OR XOR

Q11. Vu-Topper RM (1 marks)

In memory write cycle, the time for which the WE signal remains active is known as the ________. Write address setup

Write pulse width Page397

Write delay width Write data time

Q12. Vu-Topper RM (1 marks)

___________ is one of the examples of synchronous inputs.

J-K input Page235

EN input Preset input (PRE) Clear Input (CL