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CS302 Quiz 4 2026 by Iqra Azhar

Digital Logic Design PDF 418 KBUpdated 23 Oct 2026
Quiz CS302 Quiz 4 2026 by Iqra Azhar PDF 418 KB
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CS302 Digital Logic Design
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PDF 418 KB
Updated
23 Oct 2026
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CS302 · Quiz No.4 Jan 2026 · VU Zone | Iqra Azhar Official · Our Services

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90% To 100% Marks

1. Divide-by-160 counter is achieved by using:

  •  A) DIV 16 and DIV 32
  •  B) Flip-Flop and DIV 10
  •  C) Flip-Flop and DIV 16
  •  D) DIV 16 and DIV 10 Correct
  1. Assume a J-K flip-flop has 1s on the J and K inputs. The next clock pulse will cause the output to:
  •  A) Toggle Correct
  •  B) Latch
  •  C) Set
  •  D) Reset

3. The next state of a sequential circuit depends on:

  •  A) External Inputs
  •  B) Previous State
  •  C) Next State
  •  D) Present State Correct

4. With a 100 KHz clock frequency, eight bits can be serially entered

into a shift register in:

  •  A) 80 milliseconds
  •  B) 10 microseconds
  •  C) 8 microseconds
  •  D) 80 microseconds Correct
  1. To implement the counter using S-R flip-flops instead of J-K flip- flops, the _____ transition table is used:
  •  A) Next State Correct
  •  B) S-R
  •  C) J-K
  •  D) None of above

Q6. In the keyboard encoder, how many times per second does the ring counter scan the keyboard?

  •  A) 600 scans/second Correct
  •  B) 650 scans/second
  •  C) 700 scans/second
  •  D) 625 scans/second
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