Skip to content
VUBuddy

CS302P Quiz 4

Digital Logic Design (Practical) PDF 872 KBUpdated 23 Oct 2026
Quiz CS302P Quiz 4 PDF 872 KB
vubuddy.com
Type
Quiz
Course
CS302P Digital Logic Design (Practical)
Size
PDF 872 KB
Updated
23 Oct 2026
Free download 0 of 3 used today
Download free · 872 KB

You get 3 free files a day on the website. Add the Chrome extension for 30 a day.

Unlimited downloads in the Android app Get it free on Google Play

Preview text

Text from pages 1, 2 of 2. Download the file for all 2 pages.

Q1. Reflected Binary Code is also known as _______ code.

  1. BCD
  2. ASCII
  3. Gray Code
  4. Excess-3

Correct answer: Gray Code

Q2. To create a Johnson Counter by using D-flip flops, how flip flops should be connected together?

  1. Q' output of previous flip flop should be connected to D input of second flip flop
  2. Q' output of previous flip flop should be connected to clock input of second flip flop
  3. Q output of previous flip flop should be connected to D input of second flip flop
  4. Q output of previous flip flop should be connected to clock input of second flip flop

Correct answer: Q output of previous flip flop should be connected to D input of second flip flop

Q3. Total number of inputs in a half adder is __________.

  1. 3
  2. 2
  3. 4
  4. 1

Correct answer: 2

Q4. Which of the following gates is used for parity generation for a binary data string?

  1. XOR
  2. AND
  3. NOR
  4. OR

Correct answer: XOR

Q5. A decimal counter has ______ states.

  1. 2
  2. 10
  3. 7
  4. 9

Correct answer: 10

Q6. In a full adder circuit having inputs A = 1, B =1, Cin = 0, the outputs S and Cout will be _______________.

  1. S = 1, Cout = 0
  2. S = 1, Cout = 1
  3. S = 0, Cout = 1
  4. S = 0, Cout = 0

Correct answer: S = 0, Cout = 1

Q7. Following diagram is of ______________ code conversion.

  1. ASCII
  2. Gray
  3. BCD
  4. Excess-3

Correct answer: Gray

Q8. When implementing a half adder by using gates, which of the following gates is used to return carry bit as an output?

  1. AND
  2. XOR
  3. NAND
  4. OR

Correct answer: AND

Q9. To build a full adder using gates, how many gates are required?

  1. 2 AND gates, 3 OR gates, 1 XOR gates
  2. 2 AND gates, 2 OR gates, 2 XOR gates
  3. 1 AND gate, 2 OR gates, 1 XOR gate
  4. 2 AND gates, 2 XOR gates, 1 OR gate

Correct answer: 2 AND gates, 2 XOR gates, 1 OR gate

Q10. Consider the below given EWB circuit, what values will be displayed on 7-segment displays A and B when the circuit simulation is activated in EWB?

  1. 3, 3
  2. 2, 3
  3. 0, 1
  4. 1, 3

Correct answer: 3, 3

All CS302P files →
CS302P Digital Logic Design (Practical) All CS302P handouts, past papers, quizzes and MCQs in one place. Open course page

Get more out of VUBuddy, for free

Android app Free on Google Play
  • Unlimited downloads
  • The explanation behind every MCQ answer
  • Study offline on slow data
Get the Android app
Chrome extension Free on the Chrome Web Store
  • 30 downloads a day instead of 3
  • Sign in and buy Pro Semester here
Add to Chrome

One Pro Semester membership works in both the extension and the app.