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CS401 Final Term Solved MCQs Set 2 by Junaid

Computer Architecture and Assembly Language Programming PDF 1.5 MBUpdated 23 Oct 2026
Final term past paper CS401 Final Term Solved MCQs Set 2 by Junaid PDF 1.5 MB
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Final term past paper
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CS401 Computer Architecture and Assembly Language Programming
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PDF 1.5 MB
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23 Oct 2026
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Text from pages 2, 3, 4 of 34. Download the file for all 34 pages.

1. Suppose AL contains 5 decimals then after two left shifts produces the value as

20 (Page 52)

2. In graphics mode a location in video memory corresponds to a

on the screen. Line Dot (Page 149) Circle Rectangle

3. Creation of threads can be

Static Dynamic (Page 141) Easy Difficult

  1. The thread registration code initializes the PCB and adds it to the linked list so that the will give it a turn. Assembler Scheduler (Page 141) linked Debugger

5. VESA VBE 2.0 is a standard for

  •  High resolution Mode (Page 180)

6. Which of the following gives the more logical view of the storage medium

BIOS DOS (Page 155) Both None

Q7. Which of the following IRQs is derived by a key board?

  •  IRQ 0 IRQ 1 (Page 114) IRQ 2 IRQ 3

Q8. Which of the following IRQs is used for Floppy disk drive?

IRQ 4

  •  IRQ 5 IRQ 6 (Page 114) IRQ 7

Q9. Which of the following pins of a parallel port connector are grounded?

10-18 18-25 (Page 125) 25-32 32-39

10. The physical address of IDT (Interrupt Descriptor Table) is stored in

GDTR

  •  IDTR (Page 182) IVT IDTT
  1. In NASM an imported symbol is declared with the.............................. while and exported symbol is declared

With the............................

  •  Global directive, External directive External directive, Global directive (Page 189) Home Directive, Foreign Directive Foreign Directive, Home Directive
  1. In 68K processors there is a ......................... program counter (PC) that holds the address of currently executing

Instruction 8bit 16bit 32bit (Page 191) 64bit

13. To reserve 8-bits in memory _

directive is used. db. (Page 25) dw dn dd

14. In the “mov ax, 5” 5 is the

operand. Source (Page 18) Destination Memory Register

15. RETF will pop the segment address in the

CS register (Page 72) DS register SS register

ES register

16. For the execution of the instruction “DIV BL”, the implied dividend will be stored in

  •  AX (Page 85) BX CX DX

Q17. When a number is divided by zero “A Division by 0” interrupt is generated. Which instruction is used for this?

Purpose INT 0 INT 1 INT 2 This interrupt is generated automatically (Page 107)

  1. INT 21 service 01H is used to read character from standard input with echo. It returns the result in

Register. AL (Page 152) BL CL BH

19. BIOS sees the disks as

Logical storage Raw storage (Page 155) In the form of sectors only In the form of tracks only

Q20. In 9pin DB 9, which pin number is assigned to CD (Carrier Detect)?

1 (Page 171)

21. In 9pin DB 9, Signal ground is assigned on pin number

5 (Page 171)

22. In 9pin DB 9, RI (Ring Indicator) is assigned on pin number

  •  ► 6
  •  ► 7
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