CS501 Final Term Solved MCQs with References by Moaaz

Solved MCQS · From Final term Papers · Feb 22,2013 · PSMD01 · Fall 2008

Which one of the following is the memory organization of SRC processor?

•  2^8 * 8 bits
•  2^16 * 8 bits

 2^32 * 8 bits (Page 46)

•  2^64 * 8 bits

Type A format of SRC uses -----------instructions

 Two (Page 47)

•  three
•  four
•  five

The instruction ---------------will load the register R3 with the contents of the memory location M [PC+56]

•  Add R3, 56
•  lar R3, 56

 ldr R3, 56 (Page 47)

•  str R3, 56

Which format of the instruction is called the accumulator?

•  3-address instructions
•  3-address instructions
•  2-address instructions

 1-address instructions (Page 32)

•  0-address instructions

Which one of the following are the code size and the Number of memory bytes respectively for a 2-address instruction?

•  4 bytes, 7 bytes

 7 bytes, 16 bytes (Page 36)

•  10 bytes, 19 bytes
•  13 bytes, 22 bytes

Which operator is used to name registers, or part of registers, in the Register Transfer Language?

 := (Page 66)

The transmission of data in which each character is self-contained units with its own start and stop bits is ------

•  Synchronous
•  Parallel
•  All of the given options

Circuitry that is used to move data is called -------------

•  Port
•  Disk
•  Memory

Which one of the following is NOT a technique used when the CPU wants to exchange data with a peripheral device?

•  Direct Memory Access (DMA).

 Virtual Memory (Page 268)

Every time you press a key, an interrupt is generated. This is an example of

 Hardware interrupt (Page 275)

•  Software interrupt
•  Exception
•  All of the given

The interrupts which are pre-programmed and the processor automatically finds the address of the ISR using interrupt vector table are

•  Maskable
•  Non-maskable
•  Non-vectored

 Vectored (Page 277)

Which is the last instruction of the ISR that is to be executed when the ISR terminates?

 IRET (Page 278)

•  IRQ
•  INT
•  NMI

If NMI and INTR both interrupts occur simultaneously, then which one has the precedence over the other

 NMI (Page 279)

•  INTR
•  IRET
•  All of the given