CS501 Final Term Solved Subjective by Junaid
- Type
- Final term past paper
- Course
- CS501 Advance Computer Architecture
- Size
- PDF 2.2 MB
- Updated
- 23 Oct 2026
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Q1. Briefly Describe Classification of Networks?
Answer
Based on these two parameters, we have the following type of networks:
SAN (System/Storage Area Network)
It refers to a cluster of machines where large disk arrays are present. Typical distances could be tens of meters.
LAN (Local Area Network)
It refers to the interconnection of machines in a building or a campus. Distances could be in Kilometers.
WAN (Wide Area Network)
It refers to the interconnection between LANs.
Q2. Write note on Pipelining?
Answer
Q3. What is virtual memory?
Answer
Virtual memory acts as a cache between main memory and secondary memory. Data is fetched in advance from the secondary memory (hard disk) into the main memory so that data is already available in the main memory when needed. The benefit is that the large access delays in reading data from hard disk are avoided.
Q4. How does work Associative Mapping?
Answer
In this technique, block of data from main memory can be placed at any location in the cache memory. A given block in cache is identified uniquely by its main memory block number, referred to as a tag, which is stored inside a separate tag memory in the cache. To check the validity of the cache blocks, a valid bit is stored for each cache entry, to verify whether the information in the corresponding block is valid or not. Main memory address references have two fields. • The word field becomes a “cache address” which specifies where to find the word in the cache.
- The tag field which must be compared against every tag in the tag memory.
Q5. How overflow is represented in case of floating point?
Answer
e^= 255, denotes numbers with no numeric value including + ∞ and - ∞ and cal ed Not-a-Number or NaN. In computers, a floating-point number ranges from 1.2 × 10-38 ≤ x ≤ 3.4 × 1038 can be represented. If a number does not lie in this range, then overflow can occur. Overflow occurs when the exponent is too large and can not be represented in the exponent field.
Q6. What is DMA?
Answer
The disadvantage however, would be that an additional DMA controller would be required, that could make the system a bit more complex and expensive. Generally, the DMA requests have priority over all other bus activities including interrupts. No interrupts may be recognized during a DMA cycle.
Q7. Differentiate between throughput and latency?
Answer
Latency is defined as the time required to process a single instruction, while throughput is defined as the number of instructions processed per second. Pipelining cannot lower the latency of a single instruction; however, it does increase the throughput. With respect to the example discussed earlier, in a non-pipelined machine there would be one instruction processed after an average of 5 cycles, while in a pipelined machine, instructions are completed after each and every cycle (in the steady-state, of course!!!). Hence, the overall time required to execute the program is reduced.
Q8. Describe six attributes of SRC Processor?
Answer
- The SRC contains 32 General Purpose Registers: R0, R1, …, R31; each register is of size 32-bits.
- Two special purpose registers are included: Program Counter (PC) and Instruction Register (IR)
- Memory word size is 32 bits
- Memory space size is 232 bytes
- Memory organization is 232 x 8 bits, this means that the memory is byte aligned
- Memory is accessed in 32 bit words ( i.e., 4 byte chunks)
- Big-endian byte storage is used
9. Disadvantages of Software Poll and Daisy Chain
The software poll has a disadvantage is that it consumes a lot of time, while the daisy chain is more efficient. The daisy chain has the disadvantage that the device nearest to the CPU would have highest priority. So, usually those devices which require higher priority would be connected nearer to the CPU. Now in order to get a fair chance for other devices, other mechanisms could be initiated or we could say that we could start instead of device 0 from that device where the CPU finishes the last interrupt and could have a cyclic provision to different devices.
10. cache and it's management
Answer
To manage the working of the cache, cache control unit is implemented in hardware, which performs all the logic operations on the cache. As data is exchanged in blocks between main memory and cache, four important cache functions need to be defined. Block Placement Strategy Block Identification Block Replacement Write Strategy
- Steps used for floating point addition and subtraction.
Answer
The following are the steps for floating-point addition and subtraction. Unpack sign , exponent and fraction fields Shift the significand Perform addition Normalize the sum Round off the result Check for overflow TH SEMESTER
12. Diff b/w distributed computing and computer Network and classifications of networks
Answer
Difference between Distributed Computing and Computer Networks
In distributed computing, all elements which are interconnected operate under one operating system. To a user, it appears as a virtual uni-processor system. In a computer network, the user has to specify and log in on a specific machine. Each machine on the network has a specific address. Different machines communicate by using the network which exists among them.
CPU polls to identify the interrupting module and branches to an interrupt service routine on detecting an interrupt. This identification is done using special commands or reading the device status register. Special command may be a test I/O. In this case, CPU raises test I/O and places the address of a particular I/O module on the address line. If I/O module sets the interrupt then it responds positively. In the case of an addressable status register, the CPU reads the status register of each I/O module to identify the interrupting module. Once the correct module is identified, the CPU branches to a device service routine which is specific to that particular device.
14. Similarities and diff. between RAID level 4 and 5
- Make use of independent access technique.
- A bit-by-bit parity strip is calculated across corresponding strip on each data disk.
- Involves a write penalty when an I/O write request of smal size is performed.
- To calculate the new parity, the array management software must read the old user parity strip.
- Organized in a similar fashion to RAID 4
- The only difference is that RAID 5 distributes the parity strips across all disks.
Q15. Which technique allows certain hardware subsystems within a computer to access system memory for read/write independently of the main CPU?
Answer
Direct Memory Access. Allows certain hardware subsystems within a computer to access system memory for reading and/or writing independently of the main CPU. Examples of systems that use DMA: Hard Disk Controller, Disk Drive Controller, Graphics Card, Sound Card.
16. define the type of error control
Answer
There are two main issues in error control:
- Detection of Error
- Correction of Error
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