CS501 Midterm Solved MCQs with References by Arslan
- Type
- Midterm past paper
- Course
- CS501 Advance Computer Architecture
- Size
- PDF 624 KB
- Updated
- 23 Oct 2026
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MidTerm Papers Solved MCQS with Reference (1 to 22 lectures)
Q1. What is the instruction length of the FALCON-A processor?
o 8 bits
o 16 bits
PG # 91
o 32 bits
o 64 bits
Q2. What is the instruction length of the SRC processor?
o 8 bits
o 16 bits
o 32 bits
PG # 134
o 64 bits
Q3. What does the word 'D' in the 'D-flip-Flop' stands for?
o Double
o Data
PG # 76
o Digital
o Dynamic
- “If P = 1, then load the contents of register R1 into register R2”. This statement can be written in RTL as:
o R1 R2
o P: R1 R2
o P: R2 R1
o P: R2 R1, P: R1 R2
- Almost every commercial computer has its own particular ____________ language.
o assembly language
PG # 25
o English language
o Higher level language
o 3GL
- A ____________ is a computer program that is used to test and debug other programs.
o Linker
o Loader
o Debugger
o Compiler
Q7. What is the working of Processor Status Word (PSW)?
o To hold the current status of the processor.
PG # 28
o To hold the address of the current process
o To hold the instruction that the computer is currently processing
o To hold the address of the next instruction in memory that is to be executed
- The instruction ___________ will load the register R3 with the contents of the memory location M [PC+56]
o Add R3, 56
o lar R3, 56
o ldr R3, 56
PG # 47
o str R3, 56
- Motorola MC68000 is an example of _______________ microprocessor.
o CISC
PG # 148
o RISC
o SRC
o FALCON
- __________________ control signal allows the contents of the Program Counter register to be written onto the internal processor bus. o INC4
o LPC
o PCout
PG # 172
o LC
11. Op<4..0>:= IR: <15..11>:
The above RTL instruction presents the _________ of the FALCON-A Instructions.
o operation code field
PG # 105
o target register field
o operand or address index
o second operand
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