CS501 Quiz 3 Dec 2025

Quiz 1 - CS501

Question:

________ controls the sequence of the flow of microinstructions.

A. Micro program controller

B. Virtual Memory C. Multiplexer D. DMA Controller Copied: 12/24/2025, 1:45:59 PM

Quiz 2 - CS501

Question:

Identify the following type of serial communication error condition: “The prior character that was received was not still read by the CPU and is over written by a new received character.”

A. Overrun error

B. Parity error C. Framing error D. Under-run error Copied: 12/24/2025, 1:46:27 PM

Quiz 3 - CS501

Question:

Which is the last instruction of the ISR that is to be executed when the ISR terminates?

1. INT
2. NMI
3. IRQ
4. IRET

Copied: 12/24/2025, 1:46:58 PM

Quiz 4 - CS501

Question:

Which of the following control signals is NOT activated during instruction fetch operation?

1. PCout
2. Cout
3. LC
4. LMAR

Correct answer: Cout

Copied: 12/24/2025, 1:47:21 PM

Quiz 5 - CS501

Question:

How Interrupt driven I/O is better than polling because?

1. Interrupt driver I/O does not waste time on checking which device is available.
2. Interrupt driver I/O is enhanced version of polling.
3. Interrupt driver I/O is easy to design
4. Interrupt driven I/O is easy to program.

Correct answer: Interrupt driver I/O does not waste time on checking which device is available.

Copied: 12/24/2025, 1:47:33 PM

Quiz 6 - CS501

Question:

In ________, a separate address space of the CPU is reserved for I/O operations.

A. All of above

B. Isolated I/O

C. None of above D. Memory Mapped I/O Copied: 12/24/2025, 1:47:49 PM

Quiz 7 - CS501

Question:

Most parallel I/O ports used with peripheral devices are mapped on a range of______________.

A. Cache

B. contiguous addresses

C. Bus addresses D. Direct memory Access Copied: 12/24/2025, 1:48:08 PM

Quiz 8 - CS501

Question:

-------------- is the time needed by the CPU to recognize (not service) an interrupt request.