CS302 Final Term Quiz 3 File 2 July 2023 by Miss Mehwish
- Type
- Final term past paper
- Course
- CS302 Digital Logic Design
- Size
- PDF 666 KB
- Updated
- 23 Oct 2026
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Q1. Two 2-input, 4-bit multiplexers 74X157 can be connected to implement a ____ multiplexer. Options:
Correct option: a) 4-input, 16-bit
Q2. ____________ is said to occur when multiple internal variables change due to change in one input variable.
Correct option: b) Race condition
Q3. The latch is said to be in logic _________ state when Q=1 and Q'=0, and it is in the logic low state when Q=0 and Q'=1.
Correct option: b) High
Q4. Asynchronous means that ___________.
Correct option: c) Each flip-flop is enabled by the output of the preceding flip-flop
Q5. A _________ can not operate without a memory element.
Correct option: d) Counter
Q6. __________ flip-flops are obsolete now.
Correct option: c) Master-Slave
Q7. __________ occurs when the same clock signal arrives at different times at different clock inputs due to propagation delay.
Correct option: a) Clock Skew
Q8. An Asynchronous Down-counter is implemented (Using J-K flip-flop) by connecting ________Q output of all flip-flops to the clock input of the next flip-flops.
Correct option: C) Q' output of all flip-flops to K input of next flip-flops Q' output of all flip-flops to K input of next flip-flops
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