- Type
- Midterm past paper
- Course
- CS302 Digital Logic Design
- Size
- PDF 418 KB
- Updated
- 23 Oct 2026
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Text from pages 2, 3, 4 of 29. Download the file for all 29 pages.
Spring 2010
A SOP expression is equal to 1 ______________
Correct answer: When one or more product terms in the expression are equal to 1. (Page 86)
The output A < B is set to 1 when the input combinations is __________
Correct answer: A=01, B=10 (Page 109)
Two 2-bit comparator circuits can be connected to form single 4-bit comparator
Correct answer: True (Page 154)
High level Noise Margins (VNH) of CMOS 5 volt series circuits is _____________
Correct answer: 0.9 V (Page 65)
If we multiply “723” and “34” by representing them in floating point notation i.e. by first, converting them in floating point representation and then multiplying them, the value of mantissa of result will be ________
Correct answer: 24.582 (But not sure)
The output of the expression F=A+B+C will be Logic ________ when A=0, B=1, C=1. the symbol‟+‟ here represents OR Gate.
Correct answer: One
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be
Correct answer: SET (page 220)
Q3. 3 v CMOS series is characterized by __________ and _________as compared to the 5 v CMOS series.
The _______ Encoder is used as a keypad encoder.
Correct answer: Decimal-to-BCD Priority (Page 166)
How many data select lines are required for selecting eight inputs?
NOT Gate level AND Gate level OR Gate level
the diagram above shows the general implementation of ________ form
Demultiplexer has
Correct answer: Single input and multiple outputs. (Page 178)
The expression _________ is an example of Commutative Law for Multiplication.
Correct answer: AB=BA (Page 72)
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