CS302 Quiz 3 Set 3 by VU Topper RM

Q1. Vu-Topper RM (1 marks)

Demultiplexer is also called _________ A. Data router B. Data selector C. Data encoder

D. Data Distributor Page 178

Q1. Vu-Topper RM (1 marks)

2-Input, 8-bit Multiplexer, by setting the S input to logic ____ the __ inputs of both the multiplexers are selected. A. Low, B B. High, C

C. High, B

D. Low, C

Q1. Vu-Topper RM (1 marks)

On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________ A. The clock pulse is LOW B. The clock pulse is HIGH C. The clock pulse transition from HIGH to LOW

D. The clock pulse transition from LOW to HIGH Google

Q1. Vu-Topper RM (1 marks)

A NOR based S-R latch is implemented using _______ gates instead of _________ gates. A. XOR, NAND B. NOR, XOR

C. NOR, NAND Page 213

D. OR, XOR

Q1. Vu-Topper RM (1 marks)

When the number 29 is represented on 7-segment display, which BCD input is represented on LSD display unit?

1. 1001 Page 172
2. 1000
3. 1100
4. 1010

Correct answer: 1001 Page 172

Q1. Vu-Topper RM (1 marks)

The GAL22V10 is a popular GAL device having _____________ inputs and ten inputs/outputs. A. 10

B. 12 Page 194

C. 14 D. 16

Q1. Vu-Topper RM (1 marks)

The operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop ___________

A. Doesn’t have an invalid state Page 232

B. Sets to clear when both J = 0 and K = 0 C. It does not accept asynchronous inputs D. It does not show transition on change in pulse

Q1. Vu-Topper RM (1 marks)

The counter states or the range of numbers of a counter is determined by the formula. (“n” represents the total number of flip-flops) A. (n raise to power 2) B. (n raise to power 2 and then minus 1)

C. (2 raise to power n)

D. (2 raise to power n and then minus 1)

Q1. Vu-Topper RM (1 marks)

We have a digital circuit. Different parts of circuit operate at different clock frequencies (4MHZ, 2MHZ and 1MHZ), but we have a single clock source having a fix clock frequency (4MHZ), to supply the required frequency to each part of circuit, we can get help by using

A. J-K flip-flop Page 257

B. J-d flip-flop C. Both D. None of the these

Q10. Vu-Topper RM (1 marks)

Tri-State Buffer is a __________ gate with a control line that disconnects the output from the input. A. OR B. AND

C. NOT Page 196

D. NAND

Q10. Vu-Topper RM (1 marks)

GAL can be reprogrammed as instead of fuses E2CMOS logic is used which can be programmed to connect a _________ with a __________.

A. Column, row Page 191

B. column, row C. column, column D. row, row

Q10. Vu-Topper RM (1 marks)

When the control line in tri-state buffer is high, the buffer operates like a ________ gate

A. NOT Page 196

B. AND C. OR D. XOR

Q10. Vu-Topper RM (1 marks)

8-bit parallel data can be converted into serial data by using ________ multiplexer.