- Type
- MCQs
- Course
- CS501 Advance Computer Architecture
- Size
- PDF 678 KB
- Updated
- 23 Oct 2026
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Text from pages 6, 7, 8 of 9. Download the file for all 9 pages.
Q7. of 10 ( Start time: 07:26:07 PM )
Total M - 1
Which one of the following is the highest level of abstraction in digital design in which the computer architect views the system for the description of system components and their interconnections?
Processor-Memory-Switch level (PMS level)
Instruction Set Level
Register Transfer Level
Q8. of 10 ( Start time: 07:27:23 PM )
Total M - 1
What functionality is performed by the instruction “lar R3, 36” of SRC?
It will load the register R3 with the contents of the memory location M [PC+36]
It will load the register R3 with the relative address itself (PC+36).
It will store the register R3 contents to the memory location M [PC+36]
No operation
Q9. of 10 ( Start time: 07:28:47 PM )
Total M - 1
What is the working of Processor Status Word (PSW)?
To hold the current status of the processor.
To hold the address of the current process
To hold the instruction that the computer is currently processing
To hold the address of the next instruction in memory that is to be executed
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